Instruction Listing

The assembler uses the prefix '@' to denote memory addresses. A prefixed '+' or '-' indicates that a register value is to be increment or decrement before using it's value to address memory, an appended '+' or '-' means that it should be incremented or decremented afterwards.

Mnemonic                Opcode (octal)  Operation

MOV dst, src            000xxx          dst := src
MOV dst, imm            100xxx          dst := imm
MOV dst, @src           001xxx          dst := *(src)
MOV dst, @imm           101xxx          dst := *(imm)
MOV @dst, src           002xxx          *(dst) := src
MOV @dst, imm           102xxx          *(dst) := imm
MOV @dst, @src          003xxx          *(dst) := *(src)
MOV @dst, @imm          103xxx          *(dst) := *(imm)

MOV @imm, src           104xxx          *(imm) := src
MOV @imm, @src          105xxx          *(imm) := *(src)

MOV dst, @src+          004xxx          dst := *(src++)
MOV @dst+, src          005xxx          *(dst++) := src

MOV dst, @src+imm       106xxx          dst := src[imm]
MOV @dst, @src+imm      107xxx          *(dst) := src[imm]

MVL dst, src            006xxx          dst := src & 0x00FF
MVH dst, src            007xxx          dst := (src >> 8) & 0x00FF

MOV @dst+imm, src       110xxx          dst[imm] := src
MOV @dst+imm, @src      111xxx          dst[imm] := *(src)

MKW dst, src            010xxx          dst := dst | (src & 0x00FF)<<8

MOV dst, SW             011xxx          dst := SW

MOV SW, src             012xxx          SW := src
MOV SW, imm             112xxx          SW := imm
    if user mode flag is set, only ALU flags (C, Z, S) can be ovewritten

MOV @dst-, src          013xxx          *(dst--) := src
MOV @dst-, imm          113xxx          *(dst--) := imm

MOV @dst-, SW           014xxx          *(dst--) := SW
MOV @imm, SW            114xxx          *(imm) := SW

MOV dst, @+src          015xxx          dst := *(++src)
MOV SW, @+src           016xxx          SW := *(++src)
    if user mode flag is set, only ALU flags (C, Z, S) can be ovewritten

ADD dst, src            017xxx          dst += src
ADD dst, src, imm       117xxx          dst += imm
ADC dst, src            020xxx          dst += src + carry
ADC dst, src, imm       120xxx          dst += imm + carry
    carry: carry output of adder
    zero:  set if result is 0
    sign:  set to MSB of result

SUM dst, src            021xxx          dst += src
SUM dst, src, imm       121xxx          dst = src + imm
    Add without carry, status bits are left unchanged.

SUB dst, src            022xxx          dst += twos_comp(src)
SBC dst, src            030xxx          dst += not(src) + carry
    carry: carry output of adder
    zero:  set if result is 0
    sign:  set to MSB of result

INC dst, src            031xxx          dst := src + 1
DEC dst, src            032xxx          dst := src - 1
    carry: carry output of adder
    zero:  set if result is 0
    sign:  set to MSB of result

SHL dst, src            033xxx          dst := src << 1
ROL dst, src            034xxx          dst := (src << 1) | carry
    carry: set to MSB of source
    zero:  set if result is 0
    sign:  set to MSB of result

SHR dst, src            035xxx          dst := src >> 1
ROR dst, src            036xxx          dst := (src >> 1) | (carry<<15)
    carry: set to LSB of source
    zero:  set if result is 0
    sign:  set to MSB of result

NOT dst, src            037xxx          dst := not(src)
    zero:  set if result is 0
    sign:  set to MSB of result

NEG dst, src            040xxx          dst := twos_comp(src)
    carry: carry ouput from two's complement +1 addition
    zero:  set if result is 0
    sign:  set to MSB of result

ANL dst, src            023xxx          dst &= src
ANL dst, src, imm       123xxx          dst = src & imm
ORL dst, src            024xxx          dst |= src
ORL dst, src, imm       124xxx          dst = src | imm
XOR dst, src            025xxx          dst ^= src
XOR dst, src, imm       125xxx          dst = src ^ imm
    zero: set if result is 0
    sign: set to MSB of result

CMP dst, src            026xxx          compare register values
CMP dst, imm            126xxx          compare register with immediate
  subtract source or immediate from destination, ignore result.
    carry: set to carry output of adder
    zero: set if result is zero (dst==src or dst==imm)
    sign: set to MSB of result

TST dst, src            027xxx          test if bits are set
TST dst, imm            127xxx          test if bits are set
    zero: set if destination and source register have no overlapping bits,
          cleared if they do have overlapping bits
    sign: set to MSB of destination ANDed to MSB of source

SFL index               045xxx          set or clear flag
  Only the C, Z, S and I flags can be changed by this instruction.

  The I flag cannot be changed if the user mode flag is set.

  The flag index is stored in the destination index.

SEX dst, src            066xxx          subroutine execute
SEX dst, imm            166xxx          subroutine execute
  atomically execute the following:
    1. MOV @dst-, R7
    2. MOV R7, src|imm

TMC src                 077xxx          transfer machine control
  if user mode flag is set, atomically execute the following:
    1. temp := CR2
    2. *(temp--) := R6
    3. *(temp--) := R7
    4. *(temp--) := SW
    5. *(temp--) := imm
    6. R6 := temp
    7. R7 := CR0
    8. clear user mode flag

  if user mode flag is cleared, atomically execute the following:
    1. SW := *(++R6)
    2. R7 := *(++R6)
    3. R6 := *(++R6)

LSD dst, Cxx            042xxx          Load System Data
LSD dst, CRx

SSD CRx, src            043xxx          Set System Data
SSD CRx, imm            143xxx
    Ignored if used in user mode

BRO dst, src            041xxx          dst := byte_swap(src)

SWA dst, src            044xxx          swap src and dst register values

TST dst, Cxx            047xxx          test against constant
    zero: set if destination and source register have no overlapping bits,
          cleared if they do have overlapping bits
    sign: set to MSB of destination ANDed to MSB of source

MVA @dst, src           046xxx          Override MMU and access absolute
MVA @dst, imm           146xxx          address in the first 64k
MVA dst, @src           050xxx
MVA dst, @imm           150xxx
MVA @imm, src           122xxx
    Ignored if used in user mode

Pseudo instruction and assembler directives

.org <exp>          set base address        assume program base address

.def <name> <exp>
    All occourances of the given name within expressions is replaced
    with the parse tree of the given expression that is then evaluated,
    i.e. AFTER being inserted.

.equ <name> <exp>
    All occourances of the given name within expressions is replaced
    with the VALUE of the given expression, i.e. the expression is
    evaluated BEFORE being inserted.

.imp <name>         import label            see section on labels
.exp <name>         export label            see section on labels

.txt                                        enter text section
.dat                                        enter data section
.str                                        enter string section
.sec <name>                                 enter arbitrary custom section
    If the target format supports different sections in the output,
    these directives can be used to switch sections.

.dmw imm            dump machine word       write a value, truncated to
                                            the size of a word directly
                                            to the output

.asc lh "<str>"     dump string to output   Characters are stored in
                                            LH LH LH ... order in words

.asc hl "<str>"     dump string to output   Characters are stored in
                                            HL HL HL ... order in words

.utf "<str>"        dump UTF-16 string

<name> ':'                                  label definition

ADD dst, imm                                ADD dst, dst, imm
ADC dst, imm                                ADC dst, dst, imm
SUM dst, imm                                SUM dst, dst, imm
ANL dst, imm                                ANL dst, dst, imm
ORL dst, imm                                ORL dst, dst, imm
XOR dst, imm                                XOR dst, dst, imm

NOP                 no operation            MOV R0, R0
NUL dst             clear register          LSD dst, C0

SEX reg                                     SEX R6, reg
SEX imm                                     SEX R6, imm

RET reg             return from subroutine  MOV R7, @+reg
RET                                         MOV R7, @+R6

JMP reg                                     MOV R7, reg
JMP @reg                                    MOV R7, @reg
JMP imm                                     MOV R7, imm
JMP @imm                                    MOV R7, @imm
JMP @reg+imm                                MOV R7, @reg+imm

HOP reg             relative jump           SUM R7, reg
HOP imm             relative jump           SUM R7, imm
HOP label           relative jump to label  SUM R7, label-$$

SUB dst, imm                                ADD dst, dst, -imm
SBC dst, imm                                ADC dst, dst, ~imm

SUB dst, src, imm                           ADD dst, src, -imm
SBC dst, src, imm                           ADC dst, src, ~imm

INC reg                                     INC reg, reg
DEC reg                                     DEC reg, reg
SHL reg                                     SHL reg, reg
ROL reg                                     ROL reg, reg
SHR reg                                     SHR reg, reg
ROR reg                                     ROR reg, reg
NOT reg                                     NOT reg, reg
NEG reg                                     NEG reg, reg
BRO reg                                     BRO reg, reg

SET reg, imm        set bit in register     ORL reg, (1<<imm)
CLR reg, imm        clear bit in register   ANL reg, ~(1<<imm)
BIT reg, imm        test if bit is set      TST reg, (1<<imm)

PSH dst, src        push GP register        MOV @dst-, src
PSH dst, imm        push immediate value    MOV @dst-, imm
PSH dst, SW         push status word        MOV @dst-, SW

PSH src                                     MOV @R6-, src
PSH imm                                     MOV @R6-, imm
PSH SW                                      MOV @R6-, SW

POP dst, src        pop register            MOV dst, @+src
POP SW, src         pop status word         MOV SW, @+src

POP dst                                     MOV dst, @+R6
POP SW                                      MOV SW, @+R6

NAY C               clear flag              SFL 0
NAY Z                                       SFL 1
NAY S                                       SFL 2
NAY I                                       SFL 3

YAY C               set flag                SFL 4
YAY Z                                       SFL 5
YAY S                                       SFL 6
YAY I                                       SFL 7

NC.<instructon>     skip mode 1             execute if carry is not set
NZ.<instructon>     skip mode 2             execute if zero is not set
NS.<instructon>     skip mode 3             execute if sign is not set
NX.<instructon>     skip mode 4             never execute instruction

C.<instructon>      skip mode 5             execute if carry is set
Z.<instructon>      skip mode 6             execute if zero is set
S.<instructon>      skip mode 7             execute if sign is set